RC2014 devices I’ve built!
Introduction
The RC2014 is an 8-bit computer kit based on the Z80. I recommend buying and building one – it has taught me a lot. It’s easy to solder because all its components are through-hole with 2.54 mm (0.1″) pitch. (I have the Classic II version.) Here are some devices I’ve built for the RC2014.
The circuit diagrams were drawn with GNU IMP using a 7×9-pixel grid. Here is an image with all the building blocks (wires, components, letters). See also my pinouts page.
I used this circuit for address decoding in many of my devices: Peripheral Addressing – RC2014.
HD44780 LCD adapter



An adapter for connecting a Hitachi HD44780 -compatible character-based LCD module to the RC2014. I built the adapter on a Classic II prototype PCB.
Circuit diagram
List of components
- resistor, 470 Ω
- resistor, 4.7 kΩ
- capacitor, ceramic, 100 nF
- IC, 74138 (1-of-8 inverting decoder/demultiplexer)
How it works
The LCD is used in 4-bit write-only mode.
To send a nybble to the LCD, write a byte to any I/O address between 0x00–0x1f
(the exact address does not matter).
Bits of the byte (bit 7 denotes the most significant bit): 7–5 = unused, 4 = type of nybble (0=instruction, 1=data), 3–0 = the nybble to send.
You can change the I/O address range by connecting LCD EN
to a different 74138 pin:
Y0
:0x00
–0x1f
Y1
:0x20
–0x3f
Y2
:0x40
–0x5f
Y3
:0x60
–0x7f
See also: Hitachi HD44780 LCD controller – Wikipedia
Basic program
An RC2014 BASIC program that prints “Hello, World!” on the LCD:
10 REM Port, Delay, Text 20 P = 0 30 D = 10 40 T$ = "Hello, World!" 50 DATA 3,3,3,2, 2,8, 0,8, 0,1, 0,6, 0,12, -1 60 READ N 70 IF N = -1 THEN GOTO 110 80 OUT P, N 90 FOR L = 1 TO D: NEXT 100 GOTO 60 110 FOR L = 1 TO LEN(T$) 120 A = ASC(MID$(T$, L, 1)) 130 OUT P, 16 + INT(A / 16) 140 OUT P, 16 + (A AND 15) 150 FOR M = 1 TO D: NEXT 160 NEXT
7-segment/matrix LED display adapter

Lets you connect up to 8×8 LEDs (e.g. eight 7-segment displays including dots) to the RC2014. They are rapidly lit in turn, so they appear to be lit at the same time.
Circuit diagram
The 7-segment displays can be common-anode (plus, shown) or common-cathode (minus).
List of components
- 8 × resistor, 330 Ω (or according to taste)
- capacitor, ceramic, 100 nF
- IC, 74138 (1-of-8 inverting decoder/demultiplexer)
- 2 × IC, 74273 (8-bit 3-state D flip-flop with reset)
- 8 × 7-segment LED display
The 74273 chips can be replaced with 74374 chips (8-bit 3-state D flip-flop with output enable).
Connect their OE
pins to ground.
How it works
Write to any I/O address between 0x00
–0x1f
to set the “digit” bits (which 7-segment display should be lit):
- With common-anode (+) displays, one bit should be 1 and the others 0 (
0x80
,0x40
, …). - With common-cathode (−) displays, one bit should be 0 and the others 1 (
0x7f
,0xbf
, …).
Write to any I/O address between 0x20
–0x3f
to set the “segment” bits (which segments should be lit in that digit):
- With common-anode (+) displays, bits corresponding to lit segments should be 0 and the others 1 (e.g.
0x00
to light all segments). - With common-cathode (−) displays, bits corresponding to lit segments should be 1 and the others 0 (e.g.
0xff
to light all segments).
Basic program
This RC2014 BASIC program should light two segments on each of four common-anode displays:
10 REM Ports, Delay, digits, segments 20 P1 = 0 30 P2 = 32 40 D = 10 50 DATA 128,64,32,16 60 DATA 63,207,243,252 70 FOR L = 0 TO 7: READ V(L): NEXT 80 FOR L = 0 TO 3 90 OUT P1, 0 100 OUT P2, V(L + 4) 110 OUT P1, V(L) 120 FOR M = 1 TO D: NEXT 130 NEXT 140 GOTO 80
Keypad adapter, version 1

Lets you connect a 4×4-button matrix keypad to the RC2014. Simpler than version 2 (below) but cannot be extended for larger keypads. Detects up to two simultaneous keypresses correctly.
Circuit diagrams
High-level circuit diagram (no VCC/ground, pins of ICs grouped by direction):
Low-level circuit diagram (has VCC/ground, actual pinouts except for the RC2014, mimics the layout on a breadboard):
List of components
- 4 × resistor, 10 kΩ
- capacitor, ceramic, 100 nF
- 4 × diode (I used the 1N4448)
- IC, 7495 (4-bit universal shift register with separate shift and parallel-load clocks)
- IC, 74125 (Quad 3-state noninverting buffer with active low enables)
- IC, 74138 (1-of-8 inverting decoder/demultiplexer)
- matrix keypad, 4×4 buttons (should have 4 pins for rows and 4 for columns)
How it works
The 7495 IC is used only in parallel load mode, not for shifting. The diodes prevent it from short-circuiting if two buttons are pressed in the same column at the same time.
To read one row of the keypad:
- Write a byte with one bit high (e.g.
0x01
) to any I/O address between0x00
–0x1f
. This causes the 7495 to set the voltage of one keypad row high and the rest low. - Read a byte from any I/O address between
0x00
–0x1f
. The bits go through the 74125 and correspond to the buttons that were pressed in the selected keypad row.
To change the I/O address range, connect the 74138 to the 7495 and to the 74125 as follows:
- addresses
0x00
–0x1f
: 74138Y0
to 7495CLK
and 74138Y4
to 74125EN
- addresses
0x20
–0x3f
: 74138Y1
to 7495CLK
and 74138Y5
to 74125EN
- addresses
0x40
–0x5f
: 74138Y2
to 7495CLK
and 74138Y6
to 74125EN
- addresses
0x60
–0x7f
: 74138Y3
to 7495CLK
and 74138Y7
to 74125EN
Basic program
An RC2014 BASIC program that continuously prints the keypad buttons that are being held. (The same program is also used for version 2 of the keypad adapter below.)
10 REM Port, keypad Buttons, VAlues out/in 20 P = 0 30 B$ = "123A456B789C*0#D" 40 FOR L = 0 TO 3: VA(L) = 2 ^ L: NEXT 50 REM main loop (Buttons Pressed) 60 BP$ = "" 70 FOR L = 0 TO 3 80 OUT P, VA(L) 90 V = INP(P) 100 FOR M = 0 TO 3 110 IF V AND VA(M) THEN BP$ = BP$ + MID$(B$, L * 4 + M + 1, 1) 120 NEXT 130 NEXT 140 PRINT BP$ 150 GOTO 60
Keypad adapter, version 2

Lets you connect a 4×4-button matrix keypad to the RC2014. More complex than version 1 (above) but can be easily extended to 8×8 buttons. Detects up to two simultaneous keypresses correctly. Heavily based on the official Digital I/O board.
Circuit diagrams
High-level circuit diagram (no VCC/ground, pins of ICs grouped by direction):
Low-level circuit diagram (has VCC/ground, actual pinouts except for the RC2014, mimics the layout on a breadboard):
List of components
- 4 × resistor, 10 kΩ
- capacitor, ceramic, 100 nF
- 4 × diode (I used the 1N4004)
- IC, 74138 (1-of-8 inverting decoder/demultiplexer)
- IC, 74245 (8-bit 3-state noninverting bus transceiver)
- IC, 74273 (8-bit 3-state D flip-flop with reset)
- matrix keypad, 4×4 buttons (should have 4 pins for rows and 4 for columns)
The 74273 can be replaced with a 74374 (8-bit 3-state D flip-flop with output enable).
Connect its OE
pin to ground.
How it works
To read one row of the keypad:
- Write a byte with one bit high (e.g.
0x01
) to any I/O address between0x00
–0x1f
. This causes the 74273 to set the voltage of one keypad row high and the rest low. - Read a byte from any I/O address between
0x00
–0x1f
. The bits go through the 74245 and correspond to the buttons that were pressed in the selected keypad row.
The diodes prevent the 74273 from short-circuiting if two buttons are pressed in the same column at the same time.
To change the I/O address range, connect the 74138 to the 74273 and to the 74245 as follows:
- addresses
0x00
–0x1f
: 74138Y0
to 74273CLK
and 74138Y4
to 74245EN
- addresses
0x20
–0x3f
: 74138Y1
to 74273CLK
and 74138Y5
to 74245EN
- addresses
0x40
–0x5f
: 74138Y2
to 74273CLK
and 74138Y6
to 74245EN
- addresses
0x60
–0x7f
: 74138Y3
to 74273CLK
and 74138Y7
to 74245EN
Basic program
An RC2014 BASIC program that continuously prints the keypad buttons that are being held. (The same program is also used for version 1 of the keypad adapter above.)
10 REM Port, keypad Buttons, VAlues out/in 20 P = 0 30 B$ = "123A456B789C*0#D" 40 FOR L = 0 TO 3: VA(L) = 2 ^ L: NEXT 50 REM main loop (Buttons Pressed) 60 BP$ = "" 70 FOR L = 0 TO 3 80 OUT P, VA(L) 90 V = INP(P) 100 FOR M = 0 TO 3 110 IF V AND VA(M) THEN BP$ = BP$ + MID$(B$, L * 4 + M + 1, 1) 120 NEXT 130 NEXT 140 PRINT BP$ 150 GOTO 60
Extra RAM, version 1

An adapter that lets you connect a 128-kilobyte (217-byte) SRAM chip to the RC2014. The memory is organised into 4096 (212) banks. Each bank is only 32 (25) bytes. A 12-bit shift register stores the index of the current bank. Not many wires are needed but accessing the memory is slow.
Circuit diagrams
High-level circuit diagram (no VCC/ground, pins of ICs grouped by direction):
Low-level circuit diagram (has VCC/ground, actual pinouts except for the RC2014, mimics the layout on a breadboard):
List of components
- capacitor, ceramic, 100 nF
- IC, 74138 (1-of-8 inverting decoder/demultiplexer)
- 2 × IC, 74164 (8-bit serial-in parallel-out shift register)
- IC, SRAM, preferably 16k×8 to 2048k×8 bits (I used the 628128 which is 128k×8 bits)
Note: If your SRAM chip has more than 21 address lines, connect the extra lines to either ground or +5V (do not leave them floating).
How it works
To set the index of the current bank, write 12 bytes to any I/O port between 0x00
–0x1f
. (The exact port does not matter.)
The least significant bit of each byte is shifted into the least significant bit of the bank shift register. (Other bits of bytes written do not matter.)
To access the contents of the current bank, read or write I/O ports 0x20
–0x3f
. The port used specifies the address within the bank.
Tip: The order of the RAM address lines does not matter. Neither does the order of the data lines.
Basic program
The program writes the first and last eight memory banks and prints their contents.
10 PRINT "Writing banks..." 20 FOR L = 0 TO 7 30 A = L: GOSUB 500 40 A = 3: B = 1 + L: GOSUB 600 50 NEXT 60 FOR L = 0 TO 7 70 A = 4088 + L: GOSUB 500 80 A = 5: B = 129 + L: GOSUB 600 90 NEXT 100 PRINT "Reading banks..." 110 FOR L = 0 TO 7 120 A = L: GOSUB 500 130 GOSUB 700 140 NEXT 150 FOR L = 4088 TO 4095 160 A = L: GOSUB 500 170 GOSUB 700 180 NEXT 490 END 500 REM sub: set bank to a (12-bit) 510 REM destroys a, j 520 FOR J = 0 TO 11 530 OUT 0, A AND 1 540 A = INT(A / 2) 550 NEXT 560 RETURN 600 REM sub: fill bank with (addr*a+b) and 255 610 REM destroys j 620 FOR J = 0 TO 31 630 OUT 32 + J, (J * A + B) AND 255 640 NEXT 650 RETURN 700 REM sub: print bank contents 710 REM destroys j 720 FOR J = 0 TO 31 730 PRINT INP(32 + J); 740 NEXT 750 PRINT 760 RETURN
The output should look like this. (The lines with numbers on them are not shown here in full.)
Writing banks... Reading banks... 1 4 7 10 13 16 19 ... 2 5 8 11 14 17 20 ... 3 6 9 12 15 18 21 ... 4 7 10 13 16 19 22 ... 5 8 11 14 17 20 23 ... 6 9 12 15 18 21 24 ... 7 10 13 16 19 22 25 ... 8 11 14 17 20 23 26 ... 129 134 139 144 149 154 159 ... 130 135 140 145 150 155 160 ... 131 136 141 146 151 156 161 ... 132 137 142 147 152 157 162 ... 133 138 143 148 153 158 163 ... 134 139 144 149 154 159 164 ... 135 140 145 150 155 160 165 ... 136 141 146 151 156 161 166 ...
Extra RAM, version 2

An adapter that lets you connect up to 64 kilobytes of extra SRAM to the RC2014. Compared to the previous version, this one is faster and reserves fewer I/O ports but is more complex.
Circuit diagrams
High-level circuit diagram (no VCC/ground, pins of ICs grouped by direction):
Low-level circuit diagram (has VCC/ground, actual pinouts except for the RC2014, mimics the layout on a breadboard):
List of components
- resistor, 10 kΩ
- capacitor, ceramic, 100 nF
- 6 × diode (I used the 1N4448)
- IC, 74138 (1-of-8 inverting decoder/demultiplexer)
- 2 × IC, 74273 (8-bit 3-state D flip-flop with reset)
- IC, SRAM, preferably 512×8 to 64k×8 bits (I used the 628128 which is 128k×8 bits)
Notes:
- The 74273 ICs can be replaced with 74374 ICs (8-bit 3-state D flip-flop with output enable).
Connect their
OE
pins to ground. - If your SRAM chip has more than 16 address lines, connect the extra lines to either ground or +5V (do not leave them floating).
How it works
To access the SRAM:
- To set the high byte of the RAM address, write a byte to port
0x00
. - To set the low byte of the RAM address, write a byte to port
0x01
. - To read the RAM byte from the specified address, read a byte from port
0x02
. - To write the RAM byte to the specified address, write a byte to port
0x02
.
Tip: The order of the RAM address lines does not matter. Neither does the order of the data lines.
Basic program
This RC2014 BASIC program tests whether the external SRAM works correctly. It prints “Pass” or “Fail”. The program takes about 10 minutes to run.
10 PRINT "Writing" 20 FOR H = 0 TO 255 30 OUT 0, H 40 FOR L = 0 TO 255 50 OUT 1, L 60 OUT 2, (H + L) AND 255 70 NEXT: NEXT 80 PRINT "Verifying" 90 FOR H = 0 TO 255 100 OUT 0, H 110 FOR L = 0 TO 255 120 OUT 1, L 130 IF INP(2) <> ((H + L) AND 255) THEN PRINT "Fail": END 140 NEXT: NEXT 150 PRINT "Pass"
A simple address decoder

This circuit shows how to connect a peripheral (a single switch) to the RC2014 without using the 74138 chip.
Circuit diagrams
High-level circuit diagram (no VCC/ground, pins of ICs grouped by direction):
Low-level circuit diagram (has VCC/ground, actual pinouts except for the RC2014, mimics the layout on a breadboard):
List of components
- resistor, 10 kΩ
- capacitor, ceramic, 100 nF
- 2 × IC, 7400 (Quad 2-input NAND gates)
- IC, 74125 (Quad 3-state noninverting buffer with active low enables)
- switch (I used a DIP switch)
How it works
The 74125's 1OE signal is computed by seven NAND gates in the 7400 ICs: NOT ((NOT IORQ) AND (NOT A7) AND M1 AND WR), or equivalently IORQ OR A7 OR (NOT M1) OR (NOT WR).
Reading any I/O port between 0x00
–0x7f
will return the state of the switch in the least significant bit. In BASIC: PRINT INP(0) AND 1